Verilog HDL Synthesis, A Practical Primer

Verilog HDL Synthesis, A Practical Primer
by J. Bhasker

Verilog HDL Synthesis, A Practical Primer
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Book Summary Information

Author: J. Bhasker
Edition: Paperback
Audio: English (Unknown); English (Original Language); English (Published)
Published: 1998-10
ISBN: 0965039153
Number of pages: 215
Publisher: Star Galaxy Pub

Book Reviews of Verilog HDL Synthesis, A Practical Primer

Book Review: Useful for Learning Verilog which can be Synthesized
Summary: 4 Stars

I used the book with the XILINX version of ModelSim, a Verilog Simulator.
My goal was to be able to generate synthsizable Verilog without a lot of experimentation.
The style is by example. It is a good source of useful Verilog coding.
It is assumed you have some background in Verilog.
The book could use some tables on logic operators.
I think people who want to learn and use Verilog for synthesizable designs would benifit from having this book close at hand. It could be a really useful text for college students.

Summary of Verilog HDL Synthesis, A Practical Primer

With this book, you can:

- Start writing synthesizable Verilog models quickly.

- See what constructs are supported for synthesis and how these map to hardware so that you can get the desired logic.

- Learn techniques to help avoid having functional mismatches.

- Immediately start using many of the models for commonly used hardware elements described for your own use or modify these for your own application.

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